| Image | Part Number | Description / PDF | Quantity | Rfq |
|---|---|---|---|---|
 |
STMicroelectronics |
MOSFET N-CH 60V 32A POWERFLAT |
0 |
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STMicroelectronics |
AUTOMOTIVE-GRADE N-CHANNEL 40 V, |
0 |
|
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STMicroelectronics |
MOSFET N-CH 40V 40A POWERFLAT |
0 |
|
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STMicroelectronics |
AUTOMOTIVE-GRADE DUAL N-CHANNEL |
0 |
|
|
STMicroelectronics |
AUTOMOTIVE-GRADE DUAL N-CHANNEL |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 30V 4A 8SOIC |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 30V 6A 8-TSSOP |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 20V 5A 8-TSSOP |
0 |
|
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STMicroelectronics |
MOSFET 2P-CH 20V 5A 8SOIC |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 30V 65A POWERFLAT |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 30V 32A/60A PWRFLAT |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 60V 3A 8SOIC |
0 |
|
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STMicroelectronics |
MOSFET 2P-CH 30V 4A 8-SOIC |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 30V 8A 8-SOIC |
0 |
|
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STMicroelectronics |
MOSFET 2P-CH 60V 3A 8-SOIC |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 20V 5A 8-SOIC |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 30V 4.5A 8TSSOP |
0 |
|
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STMicroelectronics |
MOSFET 2N-CH 30V 5A 8-TSSOP |
0 |
|
 |
STMicroelectronics |
MOSFET N/P-CH 30V 7A/4A 8SOIC |
0 |
|
 |
STMicroelectronics |
MOSFET 2N-CH 450V 0.5A 8SOIC |
0 |
|
Field-Effect Transistors (FETs) and Metal-Oxide-Semiconductor FETs (MOSFETs) arrays are multi-transistor packages integrating multiple discrete FET/MOSFET devices in a single housing. These arrays provide compact solutions for high-density electronic systems while maintaining individual transistor functionality. They play a critical role in modern electronics by enabling efficient power management, signal processing, and switching applications across industries.
| Type | Functional Features | Application Examples |
|---|---|---|
| JFET Array | Low noise, high input impedance | Analog switches, RF amplifiers |
| MOSFET Array (Enhancement) | High switching speed, low on-resistance | Power supplies, motor drivers |
| MOSFET Array (Depletion) | Normally-on behavior, high durability | Level shifters, analog circuits |
| HEMT Array | High electron mobility, microwave performance | Satellite communication, radar systems |
Typical FET/MOSFET arrays consist of: - Silicon/compound semiconductor die with gate-source-drain terminals - Common packaging formats: DIP, SIP, QFN, or custom lead frames - Monolithic integration with shared substrate or isolation trenches - Gate oxide layers (1-10nm) and metal interconnects - Advanced variants use trench/gate-all-around structures for improved performance
| Parameter | Description | Importance |
|---|---|---|
| RDS(on) | On-state resistance | Impacts conduction loss and efficiency |
| VDS(max) | Max drain-source voltage | Determines voltage rating |
| ID(max) | Max continuous drain current | Defines current handling capability |
| Qg | Gate charge | Affects switching speed and driver requirements |
| Thermal Resistance | Junction-to-ambient resistance | Crucial for thermal management |
| Manufacturer | Representative Products | Key Features |
|---|---|---|
| Infineon Technologies | BTS724GX | Smart power MOSFET array with diagnostic functions |
| STMicroelectronics | IPD90N03S4-01 | High-side switch with 90A rating |
| ON Semiconductor | NVN4080 | Automotive-qualified 80V intelligent power array |
| Nexperia | PMBT2369 | High-speed JFET array for RF applications |
Key considerations: - Electrical requirements (voltage, current, frequency) - Thermal management capability (package thermal performance) - Integration level (number of transistors per package) - Cost vs. performance trade-offs - Automotive/industrial grade requirements (temperature range, reliability) - Example: For EV onboard chargers, select SiC MOSFET arrays with >650V rating and low RDS(on)
Current development trends include: - Transition to wide bandgap materials (SiC, GaN) for higher efficiency - 3D packaging integration for reduced parasitic inductance - Intelligent power arrays with embedded sensors - Market growth driven by EVs, 5G infrastructure, and renewable energy systems - Miniaturization through chip-scale packaging technologies