| Image | Part Number | Description / PDF | Quantity | Rfq |
|---|---|---|---|---|
 |
Nexperia |
MOSFET 2N-CH 30V 40A LFPAK56D |
0 |
|
 |
Nexperia |
MOSFET 2N-CH 40V 40A 56LFPAK |
0 |
|
 |
Nexperia |
MOSFET 2N-CH 30V 3.1A DFN2020D-6 |
0 |
|
 |
Nexperia |
MOSFET 2N-CH 100V 21A LFPAK56D |
0 |
|
 |
Nexperia |
MOSFET 2N-CH 60V 0.17A SC-88 |
738 |
|
 |
Nexperia |
MOSFET 2N-CH 60V 40A LFPAK56D |
129 |
|
 |
Nexperia |
MOSFET 2N-CH 100V 8.5A LFPAK56D |
8125 |
|
 |
Nexperia |
20 V, COMPLEMENTARY N/P-CHANNEL |
0 |
|
 |
Nexperia |
MOSFET N/P-CH 20V SOT666 |
15640 |
|
 |
Nexperia |
MOSFET 2N-CH 60V 340MA SOT666 |
333926 |
|
 |
Nexperia |
0.24A, 60V, N CHANNEL MOSFET, SC |
0 |
|
 |
Nexperia |
MOSFET 2N-CH 20V 6HUSON |
0 |
|
 |
Nexperia |
POWER FIELD-EFFECT TRANSISTOR, 3 |
0 |
|
 |
Nexperia |
MOSFET 2N-CH 30V 40A LFPAK56D |
1500 |
|
 |
Nexperia |
MOSFET 2 N-CH 60V 170MA SOT363 |
0 |
|
 |
Nexperia |
MOSFET 2N-CH 60V 35A 56LFPAK |
0 |
|
 |
Nexperia |
PFET, 100A I(D), 40V, 0.0035OHM, |
0 |
|
 |
Nexperia |
MOSFET 2N-CH 100V 21.4A LFPAK56D |
960 |
|
 |
Nexperia |
1.5A, 100V, N CHANNEL, SILICON, |
0 |
|
 |
Nexperia |
3.9A, 30V, N CHANNEL, SILICON, M |
9000 |
|
Field-Effect Transistors (FETs) and Metal-Oxide-Semiconductor FETs (MOSFETs) arrays are multi-transistor packages integrating multiple discrete FET/MOSFET devices in a single housing. These arrays provide compact solutions for high-density electronic systems while maintaining individual transistor functionality. They play a critical role in modern electronics by enabling efficient power management, signal processing, and switching applications across industries.
| Type | Functional Features | Application Examples |
|---|---|---|
| JFET Array | Low noise, high input impedance | Analog switches, RF amplifiers |
| MOSFET Array (Enhancement) | High switching speed, low on-resistance | Power supplies, motor drivers |
| MOSFET Array (Depletion) | Normally-on behavior, high durability | Level shifters, analog circuits |
| HEMT Array | High electron mobility, microwave performance | Satellite communication, radar systems |
Typical FET/MOSFET arrays consist of: - Silicon/compound semiconductor die with gate-source-drain terminals - Common packaging formats: DIP, SIP, QFN, or custom lead frames - Monolithic integration with shared substrate or isolation trenches - Gate oxide layers (1-10nm) and metal interconnects - Advanced variants use trench/gate-all-around structures for improved performance
| Parameter | Description | Importance |
|---|---|---|
| RDS(on) | On-state resistance | Impacts conduction loss and efficiency |
| VDS(max) | Max drain-source voltage | Determines voltage rating |
| ID(max) | Max continuous drain current | Defines current handling capability |
| Qg | Gate charge | Affects switching speed and driver requirements |
| Thermal Resistance | Junction-to-ambient resistance | Crucial for thermal management |
| Manufacturer | Representative Products | Key Features |
|---|---|---|
| Infineon Technologies | BTS724GX | Smart power MOSFET array with diagnostic functions |
| STMicroelectronics | IPD90N03S4-01 | High-side switch with 90A rating |
| ON Semiconductor | NVN4080 | Automotive-qualified 80V intelligent power array |
| Nexperia | PMBT2369 | High-speed JFET array for RF applications |
Key considerations: - Electrical requirements (voltage, current, frequency) - Thermal management capability (package thermal performance) - Integration level (number of transistors per package) - Cost vs. performance trade-offs - Automotive/industrial grade requirements (temperature range, reliability) - Example: For EV onboard chargers, select SiC MOSFET arrays with >650V rating and low RDS(on)
Current development trends include: - Transition to wide bandgap materials (SiC, GaN) for higher efficiency - 3D packaging integration for reduced parasitic inductance - Intelligent power arrays with embedded sensors - Market growth driven by EVs, 5G infrastructure, and renewable energy systems - Miniaturization through chip-scale packaging technologies